Low Power Algorithms for Signal Processing

In this article we present techniques to reduce power consumption in parallel processor arrays. The reduction is substantially reached by avoiding non-essential operations, i. e. operations that hardly contribute to the convergence of the considered algorithm. The presented approach is clarified on the basis of a parallel implementation of a Jacobi-like real eigenvalue decomposition (EVD) but should be transferable to other algorithms that are suited to be implemented on a parallel processor array.